DisplayPort Physical Layer Measurements Simple steps to follow for success! Brian Fetz October 30th, 2012
December 6, 2012 10 Ch 1 Maximize scale display, Trigger on Channel 1 Measure tCh1-Ch2 , tCh1-Ch3 , tCh1-Ch4 Ch 2, 3, 4 Preparing for Test Osci
December 6, 2012 11 Ch3 Ch1 For Level: Trigger on pattern or pulse or edge Average mode Measure Level… Vpeak to peak For Jitter: Pattern set to clo
Cables: low loss and phase matched. Test Point Adapter functions to consider: • Signal Access for high speed lanes • AUX Channel lane access for con
December 6, 2012 13 Agilent: Standard: W2641B Wilder: Standard: DP-TPA-P Mini DP: Mini-DP-TPA-P eDP: eDP-TPA-PRC Aux channel: DPI-TPA-A
The Test Regimen will require control of your source device: • Bit Rate 1.62, 2.7, 5.4 Gbs • Level Settings 0, 1, 2, 3 • Pre-Emphasis
Preparing for Test Control of your DisplayPort Device Agilent DisplayPort Test Application Set up your device
Start at RBR (1.62Gbs) at Level setting 0 (400mV nominal) and PreEmphasis Setting 0 (0 dB nominal). D10.2 Pattern. Set Time scale to 616 ps per divis
1 Examining Level Control Edge trigger on clock pattern Average. Set vertical to peak value at Level 0 Examining PreEmphasis and Pattern Control Puls
Examining Pattern Control Preparing for Test Verifying Control of your DisplayPort device 5.4Gbs pattern, Level 0(400mV nominal), PreEmphasis setting
December 6, 2012 19 Preparing for Test Check/Analyze your signals Differential signals. One is L0+ the other is L0- They should be equal and opposite
Topics Overview of DisplayPort Interface and Key points that affect test Quick Review of the Compliance Process Preparing for test: Validate/Chec
DisplayPort TX Testing
DisplayPort TX Testing Two Specifications in play at this time: Standard DisplayPort eDP 1.3 New specs just released: (CTS in draft) eDP 1.4 MyDP
DisplayPort Tests and Patterns December 6, 2012 22 Test RBR HBR HBR2 3-1 Eye Diagram PRBS7 PRBS7/ CP2520 CP2520 3-2 Non PreEmphasis Level PRBS7 PRBS7
DisplayPort Tests and Levels&Pre-Emphasis December 6, 2012 23 Test Levels Pre-Emphasis 3-1 Eye Diagram RBR/HBR: Setting 2 HBR2: User Choice RBR/H
Know that there are many test conditions! Eye Diagram: One Level, One P-E setting, 2 SSC states, 4 Lanes, 3 bit rates, two cable conditions for HBR2:
Test Details: Screen Shots and Discussion December 6, 2012 25 General Notes: 1. DP 1.2b testing does not change testing for RBR and HBR 2. DP 1.2 te
Test Details: Screen Shots and Discussion Eye Diagram Test: Notes: 1. RBR/HBR have fixed Mask. 2. HBR2 mask to support BER of 10-9. It is a 4 poin
Test Details: Screen Shots and Discussion Non-Pre-emphasized Level Test Notes: 1. The nominal settings of Level 0, 1, 2, 3 are 400, 600, 800, and 120
Test Details: Screen Shots and Discussion December 6, 2012 28 Pre Emphasis Tests Notes: 1. The nominal settings of Level 0, 1, 2, 3 are 0, 3.5, 6, an
Test Details: Screen Shots and Discussion Skew Notes: 1. Adjacent Lanes are offset in time by 20 unit intervals. 2. Requires a longish pattern for tim
Two Interfaces Main Link 1, 2, or 4 differential lanes 3 possible bit rates (1.62Gbs, 2.7Gbs, 5.4Gbs) 4 possible level settings (400, 600, 800,120
Test Details: Screen Shots and Discussion Frequency/SSC Tests Notes: 1. Evaluate Data Rate Trend, filter data with smoothing function 2. Downspread Ra
Test Details: Screen Shots and Discussion Jitter Tests Notes: 1. RBR/HBR unchanged from DP 1.1a. Total Jitter and non-ISI Jitter. 2. HBR2 with cabl
Test Details: Measurement Screen Shots and Discussion Dual Mode Tests Notes: 1. 4 lane DP device sends out HDMI content 2. Is not biased (pulled up to
AUX Channel Testing December 6, 2012 33 Schematic
AUX Channel Testing December 6, 2012 34 Test Condition of Test 8-1 AUX Channel Eye AUX Traffic 8-2 AUX Sensitivity AUX Traffic 8-3 AUX +Termination DC
AUX Channel Testing December 6, 2012 35 AUX Eye Testing AUX Sensitivity A B A B Source Initiation of AUX communication Receiver Response to
December 6, 2012 36 DisplayPort RX Testing Notes: 1. Only one ‘test’: Stressed Receiver Test. The idea is to put in a worst case data signal (‘stress
December 6, 2012 37 DisplayPort RX Testing Table 4.4 from DisplayPort CTS 1.2b To provide a stressed signal means: Set up a specified minimum voltag
December 6, 2012 38 DisplayPort RX Testing DisplayPort Sink Compliance Test software
Key Features • Built around the concept of Test Plan • 3 Test suites: DisplayPort Phy Layer, AUX channel, and Dual Mode. • Includes Test Selection co
Review of DisplayPort Interface Implications for Test December 6, 2012 4 Testing Main Link There are hundreds of test conditions for DisplayPort Tx a
Test Plans – Device Test Plan – Connection Test Plan – Selected Tests Source Tsting using DP Compliance Software Device Definition Test Connection
Other Considerations • Add-In your own tests • Scripts for control • Remote client Source Testing using DP Compliance Software Or save to .arsl f
Summary Take control of your DisplayPort Testing efforts: Understand the key attributes of the DisplayPort specification that have significan
December 6, 2012 43 December 6, 2012 43 Additional Resources www.agilent.com/find/displayport • Agilent’s complete solution • Source compliance sof
DP Compliance Test Process December 6, 2012 5 VESA has a ‘Look for the Logo’ campaign to promote consumer confidence. Each product will need to pas
Preparing for Test Check your Physical Layer Test Equipment December 6, 2012 6 Oscilloscope Level Accuracy Noise and Residual Jitter Channel to Cha
December 6, 2012 7 Power Meter- measures dBm: dB relative to 1mW Convert with relation: 0 dBm = 1 mW = Vrms2/50 Vrms= sq
December 6, 2012 8 Measure Vrms in lowest scale and in the scale you will be making measurements Ch1 Ch2 Ch3 Ch4 5mV/div 438uV 431uV 429uV 418uV
December 6, 2012 9 Adjust output on signal generator to full scale on which you will be making measurements Expected Jitter should be approximatel
Comments to this Manuals